MRVL in the US stock market: AI infrastructure that simultaneously masters the full stack capabilities of "customized ASIC+optical DSP+Ethernet/DPU" In summary, MRVL solves the problem of high-speed transmission of computing power between GPUs and their clusters, enabling thousands of GPUs to "interconnect at high speed, operate efficiently, and land at low cost"; Optical DSP is a must-have for achieving ultra high speed optical transmission between GPUs and their clusters. This is a must-have for GPU computing power, which enables a 60% market monopoly and maximizes the transmission of computing power What problem was solved? 1. Resolve data congestion and transmission issues GPU computing power is becoming increasingly powerful (NVDA H100/H200), but data transmission between servers/chips is too slow, with high latency and power consumption, resulting in idle computing power and low utilization This is not difficult to understand. Our early miners also faced this problem when mining. We have computing power, but how to achieve fast transmission and break through network bottlenecks? Early mining of BTC FIL also had this problem. With the same cluster computing power, if transmission is a bottleneck, other computing power with fast transmission speed will be prioritized for block bursting, and what belongs to you will be taken away; MRVL scheme: High speed optical DSP (800G/1.6T): Data travels through "light" instead of "electricity", bandwidth is increased by 10 times, latency is reduced to nanoseconds, and power consumption is reduced by 50%; 800G market share>60%, 1.6T already in mass production; SerDes/PHY+DPU+switch: high-speed interconnection between chips, servers, and racks, connecting the "last 1 centimeter" data wall; CPO/Silicon Photonics: Directly "stick" the optical module next to the GPU, completely free from copper wire limitations, supporting 4kW+ultra-high computing power platforms; 2. Addressing 'expensive costs': Cloud vendors' dependence on high priced GPUs General purpose GPUs (such as NVDA) have high unit prices, redundant computing power, and high long-term costs MRVL scheme: Customized ASIC/XPU: Help cloud giants create "customized" AI training/inference chips (such as AWS Trainium, Microsoft Maia), reducing costs by 30-50% and increasing energy efficiency by 2-3 times. Full stack design capability: from architecture IP、 One stop service from chip production to mass production, customers only need to provide requirements, and dedicated chips will be implemented within 2-3 years; Long term binding: 18+ultra large scale customers, 5-year+long-term contracts, deeply embedded in customer AI roadmap; 3. Addressing 'Low Efficiency': Power Supply and Cooling in AI Data Centers MRVL scheme: PIVR integrated power supply: Insert the power supply into the chip package, shorten the power supply path by 85%, reduce losses by 85%, support 4kW+single-chip power consumption, and free up rack space. Marvel Technology, Inc; Low power interconnection+ASIC: The power consumption of optical DSP and customized chips is much lower than that of general-purpose GPUs, and the overall PUE of the machine is reduced to below 1.2, significantly reducing electricity and cooling costs; 4. Addressing 'Ecological Fragmentation': Fragmentation of AI Infrastructure MRVL scheme: End to end full stack: the only manufacturer that simultaneously masters optical DSP+ASIC+GPU+switch+storage controller, providing "one chip to connect the entire AI link"; Unified interface+telemetry: PCIe/CXL/Ethernet fully compatible, RELIANT ™ The platform monitors the entire network link in real-time and locates faults in seconds; Without MRVL, AI data centers are just an ineffective stack of expensive GPUs. MRVL uses high-speed interconnection, customized ASICs, and efficient power supply to bridge the three core contradictions of "computing power, data, and cost"; Relationship with NVDA: 1. Nvidia invests $2 billion and holds 2.4% of the shares Huang Renxun officially confirms that MRVL is a "critical link" in Nvidia's AI infrastructure 2. Deep cooperation in technology Nvidia launches NVLink Fusion (rack level interconnect standard), allowing third-party XPU/ASIC access to the NVLink network; Provide customized XPU (ASIC)+NVLink compatible high-speed optical interconnect/network to connect Nvidia GPUs ↔ MRVL ASIC ↔ Optical DSP "full link; Customer value: Cloud vendors (AWS/Microsoft/Google) can simultaneously customize ASICs using Nvidia GPU and MRVL to build heterogeneous AI clusters, reducing costs by 30-50% 3. Joint research and development: Silicon photonics+optical interconnect Nvidia=engine (computing power), MRVL=fuel pipeline (interconnection)+customized engine (ASIC) Financial data: FY2026: Revenue+42%, Net Profit+66% (AI/Optical DSP/ASIC fully exploded) Revenue exceeds expectations Net profit: Turning losses into profits The current market value is 190 billion US dollars, and Huang Renxun calls it a trillion dollar market value stock Many aspects of AI require understanding and learning