An analysis of the potential of ZK hardware acceleration track

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1 year ago

Author: Rainy Sleep

Opportunities in blockchain often come from "solving market demands".

How to understand this? Let's take an example to get it.

In the last cycle, the DeFi Summer on ETH was hot, but it also led to problems such as high ETH Gas fees and congestion. BSC emerged during that period, and many wealth opportunities appeared accordingly. In addition to BSC, other well-known opportunities for us include Solana, Avalanche, and other Alt-Layer1.

Similarly, NFT Summer was the same. With the rise in ETH price, the market urgently needed new wealth opportunities in the ecosystem to earn ETH, accumulate ETH, or leverage ETH, so NFT became the hot spot.

ZK hardware acceleration is the same. ZK hardware acceleration aims to solve the problem of "inefficient ZK-SNARK proof generation".

At a previous conference, Vitalik mentioned that ZK-SNARK proof generation takes too long (about 20 minutes) and is inefficient. Ideally, real-time proof would be best. Therefore, to solve this problem, Vitalik proposed three solutions: "parallelization and aggregation tree", "using SNARK algos and hash to improve efficiency", and "using ASIC for ZK hardware acceleration".

My understanding is that the first two solutions aim to improve the efficiency of ZKP from a technical upgrade perspective, which takes time to achieve improvement (to be honest, I don't quite understand it, I can only understand it superficially). Using "ASIC for ZK hardware acceleration" is like some people in the gaming world installing a spirit into the mouse, using external devices to solve the inefficiency problem of ZKP.

ZK hardware acceleration can be divided into GPU, FPGA, and ASIC. Why did Vitalik specifically mention ASIC? It's because from the perspective of flexibility, GPU > FPGA > ASIC, and from the perspective of performance, ASIC > FPGA > GPU.

In simple terms, GPU is general-purpose, ASIC is customized, and feels specialized. General-purpose means everyone can use it, but the performance advantage is not so obvious, while ASIC chips can only adapt to a single solution. FPGA is between ASIC and GPU, with a certain degree of flexibility, and its performance is stronger than GPU but weaker than ASIC.

Overall, ASIC can provide higher computing performance for ZKP because the current ZKP proof technology is relatively fixed. When ZKRollup seeks ZK hardware acceleration, GPU is a general solution, but in the future, customized high-performance ASIC chips are obviously the best solution.

Currently, the leading ZK hardware acceleration project is the Cysic protocol, led by Polychain.

There are detailed introductions about Cysic, but I am not from a technical background, so I can only share my understanding with everyone. Friends who are interested in the technology itself can go to the official website / media reports to check it out.

Cysic's hardware acceleration solution consists of two parts: ZKVM+ hardware design (GPU+ASIC). Currently, Cysic provides GPU acceleration solutions for ZKRollup such as Scroll (Cysic has reserved nearly 100,000 GPU devices, and currently Cysic's advantage lies in GPU computing power, but the focus will shift to ASIC chips in the future).

ZKVM is a virtual machine environment that supports ZK circuits, with the main advantage being the continuity and parallelism of ZKVM. In plain language, when we used to deal with a large piece of cake, it required high demands on computing devices, bandwidth, and memory, but ZKVM allows us to cut the large piece of cake into small pieces, making it more convenient for us to eat, and also increasing controllability/compatibility. And parallelism allows us to cut and eat the cake at the same time, improving efficiency.

In terms of hardware design, Cysic packages the executor, which is used for computation, and a certain number of ZKVM chips and other necessary hardware into one chassis. This improves the flexibility of the device in computation and its portability in the physical world.

In short, Cysic's design is based on considerations of cost-effectiveness and energy efficiency.

Finally, let me talk about my train of thought.

Why pay attention to the ZK hardware acceleration track? It is based on the optimism for the future development of ZKRollup. ZK hardware acceleration can help ZKP proofs achieve real-time proof under external conditions, meeting the needs of ZKRollup. Therefore, when the narrative of ZKRollup becomes popular, we can completely look at ZK hardware-related projects, and there may also be speculative opportunities at that time. Personally, I think it's not too late to speculate when the ZK narrative starts to heat up (it's probably a bit difficult this year).

Reference materials:

"Vitalik's optimism for ZK hardware acceleration?" https://www.odaily.news/post/5194489https://twitter.com/BeWaterOfficial/status/1784083328737669165

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