JPMorgan Hardware & Semiconductor Forum: The Next Phase of AI, Interconnects Are Becoming the New Core Bottleneck JPMorgan recently hosted the 2026 Hardware & Semiconductor Management Access Forum in Palo Alto. Participating companies included QCOM, LITE, AOI, Cadence, Lam Research, Ranovus, Avicena, as well as the research institution 650 Group. After reviewing the entire conference, the key takeaway is that the next bottleneck lies in interconnects. Scale-up, Scale-across, 1.6T/3.2T, NPO/CPO, CW/EML lasers, custom ASICs, and even future data center CPUs are all beginning to enter the same CapEx cycle.