[Huang Renxun: Vera Rubin has been fully mass-produced, with Microsoft, Dell, and CoreWeave launching the first batch] According to Beating monitoring, Huang Renxun officially confirmed in his GTC Taipei 2026 speech that "Vera Rubin is in full production". He particularly thanked the Taiwanese supply chain partners present, stating that the supply chain scale of Vera Rubin is twice that of the previous generation Grace Blackwell, and the assembly time of a single rack has been compressed from 2 hours in the Grace Blackwell era to only 5 minutes. Huang Renxun presented a video of the entire manufacturing process of Vera Rubin on site. The entire system starts with TSMC's 3nm process and includes 7 brand new chips. It aggregates over 6 trillion transistors at the system level and over 18000 components on a single board. The whole machine is composed of 1.3 million components (third-generation MGX rack design). The HBM4 memory comes from Micron, SK Hynix, and Samsung respectively. The system adopts a wireless cable PCB mid board design, and all ConnectX-9 SuperNIC and BlueField-4 DPU are integrated onboard to ensure AI factory level reliability. The liquid cooled busbar can carry over 5000 amperes of current, equivalent to 20 electric vehicles accelerating at full throttle simultaneously. He also confirmed that Microsoft, Dell, and CoreWeave have taken the lead in deploying and running the Vera Rubin NVL72 engineering machine. Millions of square feet of production capacity have been launched to support Grace Blackwell delivery, and preparations are currently underway for Vera Rubin ramp up. Large scale shipments will be fully rolled out in the second half of 2026. In addition, Huang Renxun also showcased the Vera CPU rack (a single liquid cooled rack carrying 256 Vera CPUs, responsible for model orchestration and memory scheduling) and the brand new Groq 3 LPX low latency inference rack (256 Groq 3 LPUs, 40 PB/s SRAM bandwidth). NVL72 focuses on the highest throughput token generation, while Groq 3 LPX specializes in the lowest latency token generation, complementing each other. [Original link]