Author: TrendForce

Translated by: Shenchao TechFlow

Shenchao Overview: The ongoing tight supply of memory is changing the design logic of AI chips. Nvidia has begun evaluating the reduction of HBM configurations for the next-generation Rubin Ultra chip from the originally planned 12-layer HBM4e to various alternatives including 8-layer HBM4e, 12-layer HBM4, and 8-layer HBM4 starting in the third quarter of 2026. This is not a technical choice, but a compromise forced by the supply chain—DRAM shortage will last until 2027, and the mass production schedule for HBM4e remains uncertain. AI chip manufacturers must trade off performance and shipment volume.

According to TrendForce's latest memory industry research, the tight supply of DRAM is expected to continue until 2027, with the verification schedule for HBM4e by memory suppliers still uncertain. These limiting factors are prompting AI chip manufacturers to reduce HBM configurations for their next-generation products.

Starting in the third quarter of 2026, Nvidia has begun expanding the scope of evaluations on the HBM configurations for the Rubin Ultra chip, moving from the initial 12-layer HBM4e design to include alternatives like 8-layer HBM4e, 12-layer HBM4, and 8-layer HBM4. The final specifications are yet to be determined. In addition to Nvidia, several cloud service providers are also evaluating to lower HBM capacities for their next-generation self-developed AI ASIC chips.

TrendForce points out that the recent memory shortage has led to multiple adjustments in AI chip memory specifications. For instance, cloud service providers and server OEM manufacturers reduced the RDIMM capacity in server configurations in the first half of 2026. Recently, Nvidia decided to halve the SOCAMM capacity of the next-generation Vera Rubin super chip module after assessing that LPDDR5X supply constraints might last until 2027.

From 2025 to the first half of 2026, Nvidia maintained 12-layer HBM4e as the benchmark design for Rubin Ultra. However, starting in early Q3 2026, the company began evaluating lower-spec alternatives. This change is primarily driven by two supply-side limiting factors: first, the anticipated overall DRAM shortage in 2027 will limit the wafer capacity that memory suppliers can allocate to HBM production. Second, the verification schedule and capacity ramp-up for 12-layer HBM4e still have uncertainties.

TrendForce indicates that Nvidia's primary goal for this generation of Rubin Ultra products is to enhance I/O speed, while increasing GPU shipment volumes remains a secondary priority. If Nvidia ultimately decides to cut HBM specifications, it is expected to achieve this by reducing the number of DRAM stacking layers.

Ultimately, whether HBM4e can complete verification and enter mass production as scheduled will determine if Rubin Ultra's I/O speed can be upgraded from the previous generation Rubin's 8-11.7 Gbps to 14-16 Gbps, or if it can only reach 11-12 Gbps through HBM4 design optimization.

Meanwhile, within the same generation of products, the number of DRAM stacking layers determines the trade-off between single GPU HBM capacity and the number of GPUs that can be shipped.

TrendForce believes that the final configuration will also depend on memory suppliers' wafer allocation decisions. From a supply-demand perspective, the HBM shipment volume is expected to grow by 50-60% year-on-year in 2027, but it will still not be enough to keep up with the growth in demand.

TrendForce expects that under these supply-constrained conditions, HBM suppliers will maintain pricing power throughout 2027; the industry widely anticipates that HBM prices will rise significantly. Therefore, AI chip manufacturers will face the dual challenges of limited HBM supply and rising procurement costs, which increases the motivation to adopt lower-capacity HBM configurations.