[Citrini Analyst: Reducing HBM Stack Layers in Rubin Ultra May Not Be Bearish, Could Expand Overall HBM Demand] BlockBeats News, August 30 – Citrini analyst Jukan stated in an article that, according to his sources, the HBM specification used in NVIDIA's Rubin Ultra may be reduced from 12-layer HBM4E to 8-layer. Customers such as OpenAI and Anthropic had even requested 4-layer products, but these were rejected by memory manufacturers. Currently, the reduction may stop at 8 layers. He believes the reduction is primarily driven by yield and cost pressures: if 12-layer HBM4E is used and price increases are factored in, memory costs could account for approximately 70% of Rubin Ultra's overall material costs. Software optimizations such as model quantization, MLA, and task splitting are shifting low-frequency KV cache and model states to LPDDR, CXL, and NAND, with HBM primarily retaining the working set required for current computations. Therefore, after meeting the minimum capacity requirements, customers are beginning to prioritize HBM bandwidth over capacity. He argues that reducing the number of stack layers can improve packaging yields and increase shipments of HBM and AI accelerators, which could, in turn, expand overall HBM demand. Higher bandwidth requirements will also reduce the proportion of chips passing speed binning on wafers, further consuming DRAM wafer capacity. In the long term, HBM will eventually be replaced by new architectures, with the ultimate direction likely being the integration of memory and logic chips. The next two years will be a critical phase for memory manufacturers to determine whether they can expand into the logic domain. [Original Link]