[Intel Considering Dual-Side Power Delivery Architecture for 1.4nm Process to Catch Up with TSMC and Samsung] BlockBeats News, July 5 – Intel is considering adopting a dual-side power delivery architecture, utilizing both front-side and back-side power delivery, in its 1.4nm ultra-fine process to catch up with competitors. According to industry sources, Intel originally planned to use the back-side power delivery technology PowerDirect in its foundational 1.4nm process, 14A. However, for the subsequent 14A2 process, Intel is considering introducing the Dual Side architecture, which utilizes both front-side and back-side power delivery. Intel previously announced that the 14A process would achieve a 1.3x increase in chip density compared to the 18A process. The target M0 pitch for the 14A process is approximately 28nm, while the 14A2 process may push the M0 pitch to 21nm through half-node improvements. While maintaining a back-side power delivery network as the primary approach, Intel plans to reallocate some front-side metal wiring for auxiliary power and clock signal purposes to address power margin limitations caused by scaling and exposure constraints. Intel's 14A process is scheduled to enter risk production in 2028 and mass production in 2029. The company must release the 0.9 version of the 14A process design kit to external customers by October this year and secure confirmed orders from major fabless clients within the following 18 months. In comparison, TSMC has already planned to ship true 1.4nm A14 products in 2028, while Samsung Electronics aims to commercialize its 2nm enhanced process, SF2Z, with back-side power delivery technology in 2027. [Original Link]