TSMC is building a PLP mass production system that can significantly improve the efficiency of AI chip production On June 15th, according to etnews, TSMC will compete head-on with Samsung Electronics using its next-generation semiconductor packaging technology, Panel Level Packaging (PLP). PLP can significantly improve the production efficiency of AI chips, and as TSMC intensifies its preparations for mass production, the leadership struggle between it and Samsung Electronics, which entered the market first, seems inevitable. According to industry sources on the 15th, TSMC is building a materials, components, and equipment (MCE) supply chain to establish its PLP mass production system. Currently, TSMC is in discussions with domestic and foreign MCE companies regarding equipment investment. According to reports, TSMC plans to start mass production of PLP as early as next year, which is interpreted as a substantial step towards this goal. PLP is a technology that cuts completed circuit manufacturing wafers into independent chips (dies) and then packages them on rectangular panels to produce finished products. It contrasts with wafer level packaging (WLP) performed on circular wafers. When packaging chips on circular wafers, the edge areas cannot be made into chips and must be discarded - which means lower productivity. Packaging on rectangular panels can achieve waste free chip production. Compared to mainstream 300mm (12 inch) wafers, a standard 600x600mm rectangular panel can produce approximately five to six times the number of chips. Currently, Samsung Electronics has the advantage in PLP technology. After acquiring the PLP business from Samsung Electric in 2019, Samsung Electronics continuously accumulated technological capabilities by applying this technology to mobile application processors (APs) and power management ICs (PMICs). In contrast, TSMC has been relatively passive towards PLP before, as it has established a competitive advantage in the foundry field through traditional wafer level packaging (WLP). But with the explosive growth of the AI chip market, the situation has reversed - PLP can increase the output of AI chips and facilitate the realization of large-scale AI chips. Therefore, TSMC will actively promote its PLP business starting from 2024. TSMC is expected to build and operate a trial production line this year, and after performance evaluation, enter mass production around next year. According to reports, TSMC has acquired a global AI chip customer. As TSMC accelerates the mass production of PLP, its competition with Samsung Electronics is expected to further intensify. Samsung also plans to expand the application scope of PLP from existing APs and PMICs to high-performance computing (HPC) chips, such as AI semiconductors. In addition, glass substrates, which have attracted much attention as AI chip substrates, are also likely to be applied in this PLP process - this also indicates that Samsung Electronics and TSMC will engage in a leadership battle in the next generation substrate market. An industry insider stated, "Not only Samsung Electronics and TSMC, but also global OSAT companies have flooded into the PLP process market," and added, "It is expected that there will be fierce competition and the market will also achieve growth